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  774 caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 407-727-9207 | copyright ? intersil corporation 1999 hs-26c32rh radiation hardened quad differential line receiver pinouts HS1-26C32RH 16 lead ceramic sidebraze dip mil-std-1835: cdip2-t16 top view hs9-26c32rh 16 lead flatpack mil-std-1835: cdfp4-f16 top view 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 ain ain aout enable cout cin gnd cin vdd bin bout enable dout din din bin ain ain aout enable cout cin cin gnd 2 3 4 5 6 7 8 116 15 14 13 12 11 10 9 vdd bin bin bout enable dout din din features ? 1.2 micron radiation hardened cmos - total dose up to 300k rad (si) ? latchup free ? eia rs-422 compatible outputs ? cmos compatible inputs ? input fail safe circuitry ? high impedance inputs when disabled or powered down ? low power dissipation 138mw standby (max) ? single 5v supply ? full -55 o c to +125 o c military temperature range description the intersil hs-26c32rh is a differential line receiver designed for digital data transmission over balanced lines and meets the requirements of eia standard rs-422. radiation hardened cmos processing assures low power consumption, high speed, and reliable operation in the most severe radiation environments. the hs-26c32rh has an input sensitivity typically of 200mv over the common mode input voltage range of 7v. the receivers are also equipped with input fail safe circuitry, which causes the outputs to go to a logic 1 when the inputs are open. enable and disable functions are common to all four august 1995 spec number 518790 file number 3402.2 db na logic diagram enable enable aout bout cout din dout din cin cin bin bin ain ain +- +- +- +- truth table device power on/off inputs output enable enable input out on 0 1 x hi-z on 1 x vid 3 vth (max) 1 on 1 x vid vth (min) 0 on x 0 vid 3 vth (max) 1 on x 0 vid vth (min) 0 on 1 x open 1 on x 0 open 1 ordering information part number temperature range screening level package HS1-26C32RH-8 -55 o c to +125 o c intersil class b equivalent 16 lead sideboard dip HS1-26C32RH-q -55 o c to +125 o c intersil class s equivalent 16 lead sideboard dip hs9-26c32rh-8 -55 o c to +125 o c intersil class b equivalent 16 lead flatpack hs9-26c32rh-q -55 o c to +125 o c intersil class s equivalent 16 lead flatpack HS1-26C32RH/sample +25 o c sample 16 lead sideboard dip HS1-26C32RH/proto -55 o c to +125 o c prototype 16 lead sideboard dip hs9-26c32rh/sample +25 o c sample 16 lead flatpack hs9-26c32rh/proto -55 o c to +125 o c prototype 16 lead flatpack
775 speci?cations hs-26c32rh absolute maximum ratings reliability information supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5v to +7.0v differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12v common mode range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12v enable pins input voltage . . . . . . . . . . . . . . . . . -0.5v to vdd+0.5v dc drain current (any one output) . . . . . . . . . . . . . . . . . . . . . . 25ma dc diode input current enable pin . . . . . . . . . . . . . . . . . . . . . . . 1 m a storage temperature range . . . . . . . . . . . . . . . . . -65 o c to +150 o c lead temperature (soldering 10s) . . . . . . . . . . . . . . . . . . . . +300 o c esd classi?cation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . class 1 thermal resistance q ja q jc sbdip package. . . . . . . . . . . . . . . . . . . . 80 o c/w 20 o c/w ceramic flatpack package . . . . . . . . . . . 103 o c/w 26 o c/w maximum package power dissipation at +125 o c sbdip package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6w ceramic flatpack package . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5w maximum device power dissipation. . . . . . . . . . . . . . . . . . . . . 0.3w note: maximum device power dissipation is de?ned as vdd x icc and must withstand the added pd due to output current test; io at +125 o c derating requirements: sbdip package. . . . . . . . . . . . . . . . . . . . . . no derating required ceramic flatpack package . . . . . . . . . . . . . no derating required caution: stresses above those listed in absolute maximum ratings may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speci?cation is not im plied. operating conditions operating voltage range . . . . . . . . . . . . . . . . . . . . . +4.5v to +5.5v operating temperature range . . . . . . . . . . . . . . . . -55 o c to +125 o c common mode range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0v input low voltage (vil). . . . . . . . . . . . . . . . . . . . 0v to 0.3vdd max input high voltage (vih) . . . . . . . . . . . . . . . . . . vdd to 0.7vdd min input rise and fall time . . . . . . . . . . . . . . . . . . . . . . . . . 500ns max table 1. dc electrical performance characteristics parameter symbol (note 1) conditions group a subgroups temperature (note 2) limits units min max high level output voltage voh vdd = 4.5v, vdiff = 1.0v, io = -6ma (notes 2, 5) 1, 2, 3 -55 o c, +25 o c, +125 o c 4.1 - v low level output voltage vol vdd = 4.5v, vdiff = -1.0v, io = 6ma (note 5) 1, 2, 3 -55 o c, +25 o c, +125 o c - 0.4 v differential input voltage vth vdd = vih = 4.5v, -7.0v < vcm < 7.0v 1, 2, 3 -55 o c, +25 o c, +125 o c -400 +400 mv enabled high level input voltage vih vdd = 4.5v, 5.5v (note 4) 1, 2, 3 -55 o c, +25 o c, +125 o c 0.7 vdd -v enabled low level input voltage vil vdd = 4.5v, 5.5v (note 4) 1, 2, 3 -55 o c, +25 o c, +125 o c - 0.3 vdd v input current high (differential inputs) iinh vdd = 5.5, +v = 10v, -v = 0v and +v = 0v, -v = 10v 1, 2, 3 -55 o c, +25 o c, +125 o c - 1.8 ma input current low (differential inputs) iinl vdd = 5.5, +v = -10v, -v = 0v and +v = 0v, -v = -10v 1, 2, 3 -55 o c, +25 o c, +125 o c - -2.7 ma input leakage enable pins iin vdd = 5.5v, vin = 0v, 5.5v 1, 2, 3 -55 o c, +25 o c, +125 o c - 1.0 m a three-state output leakage current ioz vdd = 5.5v, vo = vdd or gnd 1, 2, 3 -55 o c, +25 o c, +125 o c -5.0 5.0 m a standby supply current iddsb vdd = 5.5v, vdiff = 1.0v outputs = open 1, 2, 3 -55 o c, +25 o c, +125 o c -25ma enable clamp voltage vic at -1ma 1, 2, 3 -55 o c, +25 o c, +125 o c - -1.5 v at 1ma - 1.5 input hysteresis vhyst 1 -55 o c, +25 o c, +125 o c 20 100 mv input resistance rin -7v vcm 7v 1 -55 o c, +25 o c, +125 o c 420k w notes: 1. all voltages referenced to device ground. 2. force/measure functions may be interchanged. 3. these test condition are detailed in eia specification rs-422. 4. this parameter tested as inputs for the vol, voh, ioz tests. 5. vil = 0.3vdd, vih = 0.7vdd. spec number 518790
776 speci?cations hs-26c32rh table 2. ac electrical performance characteristics parameter symbol (notes 1, 2) conditions group a subgroups temperature limits units min max propagation delay time tplh, tphl vdd = 4.5v, vdiff = 2.5v 9, 10, 11 -55 o c, +25 o c, +125 o c 640ns propagation delay time tpzh, tpzl vdd = 4.5v, vdiff = 2.5v 9, 10, 11 -55 o c, +25 o c, +125 o c 318ns propagation delay time tplz, tphz vdd = 4.5v, vdiff = 2.5v 9, 10, 11 -55 o c, +25 o c, +125 o c 629ns propagation delay time trise/tfall tthl, ttlh vdd = 4.5v, vdiff = 2.5v 9, 10, 11 -55 o c, +25 o c, +125 o c 212ns notes: 1. all voltages referenced to device ground. 2. see table eia rs-422 table 3. electrical performance characteristics parameter symbol (note 1) conditions notes temperature limits units min max input capacitance cin vdd = open, f = 1mhz 1 -55 o c, +25 o c, +125 o c -12pf output capacitance cout vdd = open, f = 1mhz 1 -55 o c, +25 o c, +125 o c -12pf fail safe fsafe + and - inputs are open, vout = logic 1 1 -55 o c, +25 o c, +125 o c 4.1 - v note: 1. the parameters listed on table 3 are controlled via design or process parameters. min and max limits are guaranteed but not d irectly tested. these parameters are characterized at initial design release and upon design changes which would affect these character istics. table 4. post irradiation electrical performance characteristics the post irradiation electrical performance characteristics are the same as the parameters listed in tables 1, 2 and 3. table 5. burn-in delta parameters (+25 o c) and group b, subgroup 5 delta parameters parameter symbol delta limits standby supply current iddsb 4ma three-state output leakage current ioz 1.0 m a low level output voltage vol 60mv high level output voltage voh 150mv input leakage current iin 150na table 6. applicable subgroups conformance group mil-std-883 method group a subgroups tested for -q recorded for -q tested for -8 recorded for -8 initial test 100% 5004 1, 7, 9 1 (note 2) 1, 7, 9 interim test 100% 5004 1, 7, 9, d 1, d (note 2) 1, 7, 9 pda 1 & 2 100% 5004 1, 7, d - 1, 7 final test 100% 5004 2, 3, 8a, 8b, 10, 11 - 2, 3, 8a, 8b, 10, 11 spec number 518790
777 speci?cations hs-26c32rh group a (note 1) sample 5005 1, 2, 3, 7, 8a, 8b, 9, 10, 11 - 1, 2, 3, 7, 8a, 8b, 9, 10, 11 subgroup b5 sample 5005 1, 2, 3, 7, 8a, 8b, 9, 10, 11 1, 2, 3 (note 2) n/a subgroup b6 sample 5005 1, 7, 9 - n/a group c sample 5005 n/a n/a 1, 2, 3, 7, 8a, 8b, 9, 10, 11 group d sample 5005 1, 7, 9 - 1, 7, 9 group e, subgroup 2 sample 5005 1, 7, 9 - 1, 7, 9 notes: 1. alternate group a testing in accordance with mil-std-883 method 5005 may be exercised. 2. table 5 parameters only table 7. total dose irradiation confomrance groups method test read and record pre-rad post-rad pre-rad post-rad group e subgroup 2 5005 1, 7, 9 table 4 1, 7, 9 table 4 table 8. burn-in test connections (vdd = 6v, 0.5v) test open ground power supply a vdd power supply b 1/2 vdd power supply c 1/2 vdd 50khz static burn-in i 3, 5, 11, 13 2, 4, 6, 8, 10, 12, 14 1, 7, 9, 15, 16 - - - static burn-in ii 3, 5, 11, 13 1, 7, 8, 9, 15 2, 4, 6, 10, 12, 14, 16 - - - dynamic burn-in option 1 - 8, 12 4, 16 1, 3, 5, 7, 9, 11, 13, 15 (note 2) - 2, 6, 10, 14 dynamic burn-in option 2 - 12, 8 4, 16 1, 7, 9, 15 3, 5, 11, 13 2, 6, 10, 14 notes: 1. each pin except for vdd and gnd will have a series resistor. (for static bi, r = 10k w 5%, for dynamic bi, r = 680 w 5%) 2. when connecting the - inputs and their associated outputs to the same supply, a power supply bypass capacitor of 22 m f must be used. table 9. irradiation test connections (t a = +25 o c, 5 o c, vdd = 5v, 10%) test open ground vdd 1/2 vdd 50khz 25khz radiation exposure 3, 5, 11, 13 2, 4, 6, 8, 10, 12, 14 1, 7, 9, 15, 16 - - - notes: 1. each pin except for vdd and gnd will have a series resistor. (r = 47k w 5%). 2. when connecting the - inputs and their associated outputs to the same supply, a power supply bypass capacitor of 22 m f must be used. table 6. applicable subgroups (continued) conformance group mil-std-883 method group a subgroups tested for -q recorded for -q tested for -8 recorded for -8 spec number 518790
778 hs-26c32rh intersil space level product flow -q wafer lot acceptance (all lots) method 5007 (includes sem) gamma radiation veri?cation (each wafer) method 1019, 4 samples/wafer, 0 rejects 100% die attach (note 1) 100% nondestructive bond pull, method 2023 sample - wire bond pull monitor, method 2011 sample - die shear monitor, method 2019 or 2027 100% internal visual inspection, method 2010, condition a csi and/or gsi pre-cap (note 7) 100% temperature cycle, method 1010, condition c, 10 cycles 100% constant acceleration, method 2001, condition per method 5004 100% pind, method 2020, condition a 100% external visual 100% serialization 100% initial electrical test (t0) 100% static burn-in 1, condition a or b, 24 hours min, +125 o c min, method 1015 100% interim electrical test 1 (t1) 100% delta calculation (t0-t1) 100% static burn-in 2, method 1015, condition a or b, 24 hours minimum, +125 o c minimum 100% interim electrical test 1 (t2) 100% delta calculation (t0-t2) 100% pda 1, method 5004 (note 2) 100% dynamic burn-in, condition d, 240 hours, +125 o c or equivalent, method 1015 100% interim electrical test 2(t3) 100% delta calculation (t0-t3) 100% pda 2, method 5004 (note 2) 100% final electrical test (t4) 100% fine/gross leak, method 1014 100% radiographic (x-ray), method 2012 (note 3) 100% external visual, method 2009 sample - group a, method 5005 (note 4) sample - group b, method 5005 (note 5) sample - group d, method 5005 (notes 5 and 6) 100% data package generation (note 8) csi and/or gsi final (note 7) notes: 1. silver glass die attach shall be permitted. 2. failures from subgroup 1, 7 and deltas are used for calculating pda. the maximum allowable pda = 5% with no more than 3% of t he failures from subgroup 7. 3. radiographic (x-ray) inspection may be performed at any point after serialization as allowed by method 5004. per method 5004, 1 view only is supplied on ?at packages and leadless chip carriers, 2 views are supplied in all other cases. 4. alternate group a testing may be performed as allowed by mil-std-883, method 5005. 5. group b and d inspections are optional and will not be performed unless required by the p.o. when required, the p.o. should i nclude separate line items for group b test, group b samples, group d test and group d samples. 6. group d generic data, as de?ned by mil-i-38535, is optional and will not be supplied unless required by the p.o. when require d, the p.o. should include a separate line item for group d generic data. group d generic data. generic data is not guaranteed to be a vailable and is therefore not available in all cases. 7. csi and/or gsi inspections are optional and will not be performed unless required by the p.o. when required, the p.o. should include separate line items for csi precap inspection, csi final inspection, gsi precap inspection, and/or gsi final inspection. 8. data package contents: ? cover sheet (intersil name and/or logo, p.o. number, customer part number, lot date code, intersil part number, lot number, qu an- tity). ? wafer lot acceptance report (method 5007). includes reproductions of sem photos with percent of step coverage. ? gamma radiation report. contains cover page, disposition, rad dose, lot number, test package used, speci?cation numbers, test equipment, etc. radiation read and record data on ?le at intersil. ? x-ray report and ?lm. includes penetrometer measurements. ? screening, electrical, and group a attributes (screening attributes begin after package seal). ? lot serial number sheet (good units serial number and lot number). ? variables data (all delta operations). data is identi?ed by serial number. data header includes lot number and date of test. ? group b and d attributes and/or generic data is included when required by the p.o. ? the certi?cate of conformance is a part of the shipping invoice and is not part of the data book. the certi?cate of conformanc e is signed by an authorized quality representative. spec number 518790
779 hs-26c32rh intersil space level product flow -8 gamma radiation veri?cation (each wafer) method 1019, 4 samples/wafer, 0 rejects 100% die attach (note 1) periodic- wire bond pull monitor, method 2011 periodic- die shear monitor, method 2019 or 2027 100% internal visual inspection, method 2010, condition b csi and/or gsi pre-cap (note 6) 100% temperature cycle, method 1010, condition c, 10 cycles 100% constant acceleration, method 2001, condition per method 5004 100% external visual 100% initial electrical test 100% dynamic burn-in, condition d, 160 hours, +125 o c or equivalent, method 1015 100% interim electrical test 100% pda, method 5004 (note 2) 100% final electrical test 100% fine/gross leak, method 1014 100% external visual, method 2009 sample - group a, method 5005 (note 3) sample - group b, method 5005 (note 4) sample - group c, method 5005 (notes 4 and 5) sample - group d, method 5005 (notes 4 and 5) 100% data package generation (note 7) csi and/or gsi final (note 6) notes: 1. silver glass die attach shall be permitted. 2. failures from subgroup 1, 7 are used for calculating pda. the maximum allowable pda = 5%. 3. alternate group a testing may be performed as allowed by mil-std-883, method 5005. 4. group b, c and d inspections are optional and will not be performed unless required by the p.o. when required, the p.o. shoul d include separate line items for group b test, group c test, group c samples, group d test and group d samples. 5. group c and/or group d generic data, as de?ned by mil-i-38535, is optional and will not be supplied unless required by the p. o. when required, the p.o. should include a separate line item for group c generic data and/or group d generic data. generic data is no t guar- anteed to be available and is therefore not available in all cases. 6. csi and/or gsi inspections are optional and will not be performed unless required by the p.o. when required, the p.o. should include separate line items for csi precap inspection, csi final inspection, gsi precap inspection, and/or gsi final inspection. 7. data package contents: ? cover sheet (intersil name and/or logo, p.o. number, customer part number, lot date code, intersil part number, lot number, qu an- tity). ? gamma radiation report. contains cover page, disposition, rad dose, lot number, test package used, speci?cation numbers, test equipment, etc. radiation read and record data on ?le at intersil. ? screening, electrical, and group a attributes (screening attributes begin after package seal). ? group b, c and d attributes and/or generic data is included when required by the p.o. ? the certi?cate of conformance is a part of the shipping invoice and is not part of the data book. the certi?cate of conformanc e is signed by an authorized quality representative. spec number 518790
780 hs-26c32rh spec number 518790 propagation delay timing diagram input output -vin +vin = 0v voh vol tplh 0v -2.5v +2.5v vs = 50% tphl propagation delay load circuit dut test cl rl point cl = 50pf rl = 1000 w three-state low timing diagrams three-state low load circuit three-state low voltage levels parameter hs-26c32rh units vdd 4.50 v vih 4.50 v vs 2.25 v vt 50 % vw vol + 0.5 v gnd 0 v vs input vih vss tpzl tplz output voz vol vt vw dut test cl rl point cl = 50pf rl = 1000w vdd three-state high timing diagrams three-state high load circuit three-state high voltage levels parameter hs-26c32rh units vdd 4.50 v vih 4.50 v vs 2.25 v vt 50 % vw voh - 0.5 v gnd 0 v vs input tpzh tphz output voh voz vt vw vih vss dut test cl rl point cl = 50pf rl = 1000 w
781 hs-26c32rh spec number 518790 metallization topology die dimensions: 84mils x 130 mils (2140 m m x 3290 m m) metallization: m1: mo/tiw thickness: 5800 ? m2: al/si/cu thickness: 5800 ? metallization mask layout hs-26c32rh ain vdd bin ain (2) aout (3) enab (4) cout (5) cin (6) (8) (9) (14) bin (13) bout (12) enab (11) dout (10) din (1) (16) (15) (7) cin gnd din glassivation: type: sio 2 thickness: 10k ? 1k ? worst case current density: <2.0 x 10 5 a/cm 2 bond pad size: 110 m m x 100 m m
782 all intersil semiconductor products are manufactured, assembled and tested under iso9000 quality systems certi?cation. intersil products are sold by description only. intersil corporation reserves the right to make changes in circuit design and/o r speci?cations at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of p atents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiaries. for information regarding intersil corporation and its products, see web site http://www.intersil.com sales of?ce headquarters north america intersil corporation p. o. box 883, mail stop 53-204 melbourne, fl 32902 tel: (407) 727-9207 fax: (407) 724-7240 europe intersil sa mercure center 100, rue de la fusee 1130 brussels, belgium tel: (32) 2.724.2111 fax: (32) 2.724.22.05 asia intersil (taiwan) ltd. taiwan limited 7f-6, no. 101 fu hsing north road taipei, taiwan republic of china tel: (886) 2 2716 9310 fax: (886) 2 2715 3029 hs-26c32rh spec number


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